THOMAS HENRY CMOS ADSR
Original Schematics: LINK1, LINK2
STRIPBOARD LAYOUT
-All diodes are 1N4148
-555 timer chip should be CMOS one like TLC555
-All decoupling capacitors, 100nF are soldered underneath the boards, so I omitted them on the layout.
FACEPLATE LAYOUT
-This layout is actual size so it can be used as a drilling template.
Potentiometer hole = 7mm
3.5mm jack hole = 6mm
SPDT toggle switch hole = 6mm
mounting screw hole = 3mm
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